DM9000AEP

fully integrated, cost-effective, low pin count, single chip, Fast Ethernet Controller, QFP48, 16K byte

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Price:: US $2.00~4.00 / piece [Get Latest Price]

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PartNumber:: DM9000AEP

Brand:: Davicom Semiconductor,Inc. - Davicom | Pack: QFP | D/C: 10+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-06-13

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Part Number:DM9000AEP
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Product Summary

The DM9000AEP is a fully integrated and cost-effective low pin count single chip Fast Ethernet controller with a general processor interface, a 10/100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V IO tolerance. The DM9000AEP supports 8-bit and 16-bit data interfaces to internal memory accesses for various processors. The DM9000AEP is fully compliant with the IEEE 802.3u Spec. Its auto-negotiation function will automatically configure the device to take the maximum advantage of its abilities. The device also supports IEEE 802.3x full-duplex flow control.

Parametrics

DM9000AEP absolute maximum ratings: (1)Supply Voltage:-0.3V to 3.6V; (2)DC Input Voltage (VIN):-0.5V to 5.5V; (3)DC Output Voltage(VOUT):-0.3V to 3.6V; (4)Storage Temperature range:-65℃ to +150℃; (5)Case Temperature:0℃ to 85℃; (6)Ambient Temperature:0℃ to +70℃; (7)Lead Temperature(TL,soldering,10 sec.):+235℃; (8)Lead Temperature(TL,soldering,10 sec.):+260℃.

Features

DM9000AEP features: (1)Supports early Transmit ; (2)Supports IP/TCP/UDP checksum generation and checking; (3)Supports automatically load vendor ID and product ID from EEPROM; (4)Optional EEPROM configuration; (5)Very low power consumption mode; (6)48-pin LQFP; (7)Supports processor interface: byte/word of I/O command; (8)to internal memory data operation; (9)Integrated 10/100M transceiver with HP Auto-MDIX; (10)Supports back pressure mode for half-duplex mode flow control; (11)IEEE802.3x flow control for full-duplex mode; (12)Supports wakeup frame, link status change and magic packet; (13)events for remote wake up; (14)Support 100M Fiber interface; (15)Integrated 16K Byte SRAM; (16)Build in 3.3V to 2.5V regulator.